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The Human Capital
 
Physical Design-Engineer/Senior Engineer/Staff
Posted on: 20th Nov 2008
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Job Description

Senior/Staff Physical Design Engineers


Client: Advanced Micro Devices (AMD)

Location:Hyderabad


Education: Engineering Degree

Exp: Minimum 3+ years

       

Position: Senior Engineer

No of Positions: 6

1. Physical Design

Key Responsibilities

This is a full time position in  Hyderabad office.  As a Sr. Physical Design Engineer you will be responsible for the entire Physical implementation of our chips designed for PC, Handheld, Entertainment or DTV requirements.  This position requires interface with large front-end design teams in US, Canada and India, mentoring new hires and owing an entire chip from inception to tapeout. This may require travel to our other Design Centers.

The Sr. Physical Design Engineer will be responsible for execution of Full chip floor planning and block level physical design activities for a given ASIC product, which includes: floor planning, placement, scan-reordering, clock tree synthesis, in place optimization, routing, timing analysis/closure and ECO tasks (timing, functional, noise based ECOs), design rule checks (DRC), and Layout vs. Schematic  (LVS) checks. In addition to this, He/She will also be participating in Physical design Flow development/upgrade by continuously working with the internal design teams and CAD vendors.

In addition, following is desirable:

Effective written and oral communication skills in English

Understanding Verilog HDL

Understanding Deep Submicron effects such as 90nm and below

Understanding OCV, DFM, DFY

Excellent Block level and Fullchip level Timing closure skills

Displaying motivation, leadership skills and working in teams

Job Requirements:

Minimum 4 year of ASIC physical design experience.

Reasonable Back ground of ASIC Physical Design: Floor planning, Clock Tree Synthesis, P&R extraction, IR Drop Analysis, timing and Signal Integrity closure.

Hands on experience and reasonable knowledge in Cadence and Synopsys Physical Implementation Tools

Should have participated in a minimum of 3-4 fullchip tapeouts.

Scripting Language with PERL, TCL, AWK, shell scripting is highly desirable.

Familiar with Physical Verification will be a plus.

Contact
Kapil
The Human Capital

"Mining the knowledge Community"

kapil@ thehumancapital.net

www.thehumancapital.net

Cell:9810199914


 
Additional Information
  Experience: 1 - 11 years  
  Education: B.E/B.Tech, M.E/M.Tech/MS, Phd  
  Job Category:  Software, Hardware, EDP  
  Job Location: Hyderabad  
  Key Skills: "Physical Design",ASIC,Layout,DRC,LVS,"Floor Planning",Clock Tree Synthesis, P&R extraction, IR Drop Analysis, "timing and Signal Integrity closure",Perl,TCL,awk,"physical verification",PnR  
  Industry: IT/ Computers - Hardware  
  Role: • Team Leader/ Technical Leader • Hardware Design Engineer • Hardware Design Technical Leader  
 
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