ASIC Design Manager

Location:Hyderabad

• Participate in Architectural decisions, contribute to chip level specification, Technical Reference Manual, understand Top level design integration and partitioning issues and guide and manage accordingly
• Review block/chip specification, design, and verification plan and results
• Review and supervise Synthesis, STA, Timing closure tasks
• Guide the team in Chip DV & DV closure including FPGA diagnostics tests and chip bring-up evaluation.
• Supervise DFT, Scan Insertion, Memory BIST, ATE testing tasks
• Monitor the progress, ensure completion of the project within the schedules.
• Understand technology and library issues, PD flow requirements, interact with PD team and help decide on the design timing closure issues

Skills & Experience requirements

• Around 10 years of epxerience
• Handling full chip ASIC design projects from specification to tape-out, by leading or managing the ASIC design teams.
• Working knowledge in low power chip designs is useful.
• Should have had hands-on experience for few years in RTL design, Synthesis, STA, Design Verification at block level or chip level
• Good understanding about Front-end design flow, development environment, design verification requirements and front-end tools is expected
• Exposure to multimedia technologies, functions, interfaces, standards, protocols is useful
• Should be dynamic, pro-active and committed in project execution adhering to schedules and delivering expected results with quality output.  Required to be meticulous in planning and monitoring of tasks progress.
• Contact:Uday

                     CEO,The Human Capital

uday@ thehumancapital.net

www.thehumancapital.net

                      Cell:9900165644(blr)/9810344234(Delhi)